Charge sharing

In digital electronics, charge sharing is an undesirable signal integrity phenomenon observed most commonly in the Domino logic family of digital circuits. The charge sharing problem occurs when the charge which is stored at the output node in the phase is shared among the output or junction capacitances of transistors which are in the evaluation phase. Charge sharing may degrade the output voltage level or even cause erroneous output value[1]

References

  1. ↑ Mohit Kumar Gupta (2006). EDA for IC implementation, circuit design, and process technology. CRC Press. ISBN 0-8493-7924-5.


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